Hi, I'm JP.

I'm a third-year student at Case Western Reserve University, studying Electrical Engineering and Computer Engineering. My interests are digital design, design verification, and computer architecture.

I work on FPGA and ASIC projects, including a pipelined RISC-V processor and an asynchronous FIFO. I also founded ASICWRU, our student-led silicon design team, where we learn about chip design and build projects together.